ECET 230 ECET230 Week 3 iLab Solution

ECET 230 ECET230 Week 3 iLab Solution


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ECET 230 Week 3 iLab Designing Adders and Subtractors


  1. 1.         To understand the use of BIT and INTEGER data types in VHDL.
  2. 2.         To understand how to use integer addition or subtraction in a VHDL Dataflow architecture.
  3. 3.         To compile and synthesize the VHDL files that can be used to program the eSOC III board to perform arithmetic functions.
  4. 4.         To build a functioning 4-bit adder/subtractor.
  5. 5.         To build a functioning 8 operation arithmetic and logic unit (ALU)


            In this lab, we developed a bit and integer data types to simulate a functioning 4-bit adder and subtractor. Afterwards we compile the data, we continue to simulate it on the waveform. After we did the adder and subtractor simulation, we were told to develop a functioning 8 operation arithmetic code and then we simulated on the waveform to see if it works. The data is shown below.



            At the end of all the test, we learn how to properly set up the VHDL files to preform a adder and subtractor and set up an arithmetic operation. We did come across problems when writing the code but we fixed it with no problem after wards.

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