ECET 230 ECET230 Week 2 iLab Solution

ECET 230 ECET230 Week 2 iLab Solution


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ECET230 Week 2 iLab Decoders and Multiplexers

Objectives: Discover the operation of 7-segment displays, BCD-to-7-semgment decoders, multiplexers and demultiplexers.  Demonstrate the simulation of a discrete DEMUX and decode operation with discrete components.  Construct a discrete circuit with these components.  Use VHDL to emulate this circuit within an FPGA. 

Why are the 330 Ω resistors required for the discrete logic circuit, but not for the MultiSim simulated circuit or the eSOC III circuit?

Create a partial truth table showing the requirements for a seven-segment decoder to output a hexadecimal digit. This requires four input bits and six output states, A – F. For each output state, show the segments a-g. The output states for the inputs 0 – 9 are the same as for the 74LS47 (see Use capital letters A, C, E, F and lower case for b and d.

Why is the seven-segment display driven with an active-LOW signal using discrete logic and an active-HIGH with the eSOC board?

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