
DeVry ECET 230 ECET230 Quiz 2 Answers
ECET 230 ECET230 Quiz 2
- (TCO-1) In a VHDL entity file, the signal mode that allows a port identifier to act as both an input and output is
- (TCO 1) What is the VHDL assignment operation for the circuit shown below?
- (TCO-2) A multiplexer has four data select lines, A3–A0. How many input signals are multiplexed?
- (TCOs 1 and 2) Write the VHDL assignment operator for the Y3 output of a 1-to-4 demultiplexer. Use Boolean operators, D for the data input, S0-S1 for the select lines, and Y0-Y3 for the outputs.
- (TCO 1 and 3) Write the VHDL text file for a 9-bit subtractor using INTEGER types.
- (TCO 1) Write the VHDL text file to implement the Boolean equation Y = AB + C + DE. Use BIT signal types.
- (TCO-1) Which punctuation mark(s) is used to indicate a comment in VHDL?
- (TCO 1) What is the VHDL assignment operation for the circuit shown below?
- (TCO-2) Which of the following devices would be used to translate an input to a binary code?
- (TCOs 1 and 2) Write the VHDL assignment operator for the Y3 output of a 1-to-4 demultiplexer. Use Boolean operators, D for the data input, S0-S1 for the select lines, and Y0-Y3 for the outputs.
- (TCO 1 and 3) Write the VHDL text file for a 6-bit adder using INTEGER types.
- (TCO-1) Write the VHDL text file for an exclusive-NOR gate. Use A and B as inputs and Y as the output. Use BIT signal types.
- (TCO-1) Which of the following is a VHDL key word?
- (TCO 1) What is the VHDL assignment operation for the circuit shown below?
- (TCO-2) A multiplexer has four data select lines, A3–A0. How many input signals are multiplexed?
- (TCO-1 and 2) Write the VHDL assignment operator for the Y1 output of a 1-to-4 demultiplexer. Use Boolean operators, D for the data input, S0-S1 for the select lines, and Y0-Y3 for the outputs.
- (TCO 1 and 3) Write the VHDL text file for a circuit to implement the arithmetic circuit that subtracts two 12-bit numbers (B from A) and adds a third 12-bit number (C) from the result. Use INTEGER types
- (TCO 1) Write the VHDL text file to implement the Boolean equation Y = AB + CD. Use BIT signal types.